Digital Design Engineer, California
Digital Design Engineer, California
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California, USA
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Posted: 06/08
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Description
Overview:
Rambus, a premier chip and silicon IP provider, is seeking to hire an entry level Digital Design Engineer to join our Bufferchip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
Location: Agoura Hills, CA
Responsibilities:
Design of high-speed CMOS Digital Logic
Planning: design block specification, block level simulation, documentation
Implementation: RTL design in Verilog, lint, clock domain crossing (CDC) analysis, synthesis, timing analysis, timing closure, DFT-related tasks
Verification: work with verification team on planning and execution, simulation, debugging block and system level simulations, formal verification, preparation of technical reviews and product/block documentation
Flow and methodology: work in a dynamic and interdisciplinary R&D group that influences and guides Rambus’ technical direction by understanding and contributing to flow and methodology development
Interact with technical leaders of the company and senior staff in engineering to help ensure successful development of high value technologies and products
Qualifications:
Bachelor's or Master's Degree in Electrical or Computer Engineering
1 years of relevant digital/ASIC/IC design experience for Bachelor's Degree
Knowledge of RTL coding in Verilog and/or VHDL
Knowledge of standard ASIC software tools (synthesis, simulation, equivalence checking, static timing analysis)
Knowledge of scripting, Linux/Unix environment, and basic C/C++ programming
Understanding of ASIC design flow
Design for verification understanding (assertion-based design strategies, code coverage, functional coverage, test plans etc.) would be a plus
Self-starter and fast learner with excellent interpersonal skills
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
The US salary range for this full-time position is $83,400 to $154,800. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit (url removed). For additional information on life at Rambus and our current openings, check out (url removed)/careers/.
#LI-HYRBID
#LI-LH1
Rambus, a premier chip and silicon IP provider, is seeking to hire an entry level Digital Design Engineer to join our Bufferchip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
Location: Agoura Hills, CA
Responsibilities:
Design of high-speed CMOS Digital Logic
Planning: design block specification, block level simulation, documentation
Implementation: RTL design in Verilog, lint, clock domain crossing (CDC) analysis, synthesis, timing analysis, timing closure, DFT-related tasks
Verification: work with verification team on planning and execution, simulation, debugging block and system level simulations, formal verification, preparation of technical reviews and product/block documentation
Flow and methodology: work in a dynamic and interdisciplinary R&D group that influences and guides Rambus’ technical direction by understanding and contributing to flow and methodology development
Interact with technical leaders of the company and senior staff in engineering to help ensure successful development of high value technologies and products
Qualifications:
Bachelor's or Master's Degree in Electrical or Computer Engineering
1 years of relevant digital/ASIC/IC design experience for Bachelor's Degree
Knowledge of RTL coding in Verilog and/or VHDL
Knowledge of standard ASIC software tools (synthesis, simulation, equivalence checking, static timing analysis)
Knowledge of scripting, Linux/Unix environment, and basic C/C++ programming
Understanding of ASIC design flow
Design for verification understanding (assertion-based design strategies, code coverage, functional coverage, test plans etc.) would be a plus
Self-starter and fast learner with excellent interpersonal skills
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.
Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.
The US salary range for this full-time position is $83,400 to $154,800. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.
Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.
Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.
Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.
For more information about Rambus, visit (url removed). For additional information on life at Rambus and our current openings, check out (url removed)/careers/.
#LI-HYRBID
#LI-LH1
Highlights
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Company nameRambus
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Job positionDigital Design Engineer
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